The present invention relates generally to the field of electroplating. In particular, the present invention relates to the field of copper electroplating on a seed layer.
The trend toward smaller microelectronic devices, such as those with sub-micron geometries, has resulted in devices with multiple metallization layers to handle the higher densities. One common metal used for forming metal lines, also referred to as wiring, on a semiconductor wafer is aluminum. Aluminum has the advantage of being relatively inexpensive, having low resistivity, and being relatively easy to etch. Aluminum has also been used to form interconnections in vias to connect the different metal layers. However, as the size of via/contact holes shrinks to the sub-micron region, a step coverage problem appears which in turn can cause reliability problems when using aluminum to form the interconnections between the different metal layers. Such poor step coverage results in high current density and enhances electromigration.
One approach to providing improved interconnection paths in the vias is to form completely filled plugs by using metals such as tungsten while using aluminum for the metal layers. However, tungsten processes are expensive and complicated, tungsten has high resistivity, and tungsten plugs are susceptible to voids and form poor interfaces with the wiring layers.
Copper has been proposed as a replacement material for interconnect metallizations. Copper has the advantages of improved electrical properties as compared to tungsten and better electromigration property and lower resistivity than aluminum. The drawbacks to copper are that it is more difficult to etch as compared to aluminum and tungsten and it has a tendency to migrate into (and diffuse rapidly through a) dielectric layer such as silicon dioxide. To prevent such migration, a barrier layer, such as titanium nitride, tantalum, tantalum nitride, tantalum silicon nitride, tungsten nitride, and the like, must be used prior to the depositing of a copper layer.
Typical techniques for applying a copper layer, such as electrochemical deposition, are only suitable for applying copper to an electrically conductive layer. Thus, an underlying conductive seed layer, typically a metal seed layer such as copper, is generally applied to the substrate prior to electrochemically depositing copper. Such seed layers may be applied by a variety of methods, such as physical vapor deposition (xe2x80x9cPVDxe2x80x9d; which includes sputtering, evaporation, or deposition from ionized metal plasma of hollow cathode magnetron sources) and chemical vapor deposition (xe2x80x9cCVDxe2x80x9d, which includes deposition from metal or organometallic precursors comprising one of more metal atoms in combination with inorganic or organic ligands such as halides, pseudohalides, carbonyls, nitriles, alkyls, olefins, allyls, arenes, phosphines, amines, and the like). Typically, seed layers are thin in comparison to other metal layers, such as from 50 to 1500 angstroms thick. Such metal seed layers, particularly copper seed layers, may suffer from problems such as metal oxide both on the surface of the seed layer and in the bulk of the layer as well as significant variations in thickness or discontinuities in the layer.
Oxide on a metal seed layer, particularly a copper seed layer, interferes with subsequent copper deposition. Such oxide forms from exposure of the metal seed layer to sources of oxygen, such as air. Typically, the longer such seed layer is exposed to oxygen, the greater the amount of oxide formation. Where a copper seed layer is thin, the copper oxide may exist as copper oxide throughout the layer. In other areas of electroplating, such as in electronics finishing, copper oxide layers are typically removed by acidic etching baths. These baths dissolve the oxide layer, leaving a copper metal surface. Such etching processes are not generally applicable to copper seed layers because of the thinness of the seed layer. As the oxide is removed from the seed layer surface there is the danger that the entire seed layer may be removed in places, creating discontinuities in the seed layer.
U.S. Pat. No. 5,824,599 (Schacham-Diamand et al.) discloses a method of preventing oxide formation on the surface of a copper seed layer by conformally blanket depositing under vacuum a catalytic copper layer over a barrier layer on a wafer and then, without breaking the vacuum, depositing a protective aluminum layer over the catalytic copper layer. The wafer is then subjected to an electroless copper deposition solution which removes the protective aluminum layer exposing the underlying catalytic copper layer and then electrolessly deposits copper thereon. However, such method requires the use of a second metal, aluminum, which adds to the cost of the process and the presence of any unremoved protective layer prior to the electroless deposition of the copper may cause problems in the final product, such as an increase in resistivity. In addition, the dissolved aluminum may build up in the electroless copper bath, which could also cause problems in the final product.
The step coverage by the PVD copper seed layer at apertures less than 0.18 xcexcm on advanced interconnects becomes a limiting factor for void free copper fill. Decreased step coverage on the lower sidewalls of vias and trenches leads to a thin and discontinuous copper seed layer. Discontinuities or voids are areas in the seed layer where coverage of the metal, such as copper, is incomplete or lacking. Such discontinuities can arise from insufficient blanket deposition of the metal layer, such as depositing the metal in a line of sight fashion. Subsequent copper electroplating fill with traditional electrolytes and additives results in the formation of bottom voids, associated with incomplete fill over the discontinuous copper seed. In order for a complete metal layer to be electrochemically deposited on such a seed layer, the discontinuities must be filled in prior to or during the deposition of the final metal layer, or else voids in the final metal layer may occur.
PCT patent application number WO 99/47731 (Chen) discloses a method of providing a seed layer by first vapor depositing an ultra-thin seed layer followed by electrochemically enhancing the ultra-thin seed layer to form a final seed layer. According to this patent application, a two step process provides a seed layer having reduced discontinuities. The copper seed layer is enhanced by using an alkaline electrolytic bath. One using this method to enhance a seed layer would have to rinse and neutralize the seed layer before using conventional acidic electrolytic plating baths. In addition, a manufacturer using such alkaline enhancement method in combination with an acid electroplating bath would have to double the number of plating heads on the plating tool or throughput would decrease.
In general, the electrochemical metallization process for advanced interconnects uses a highly conductive sulfuric acid electrolyte (170 g/L H2SO4), cupric sulfate (17 g/L), and chloride ions (50-70 mg/L). An organic additive package is used to assist in the development of bottom-up fill, and to promote a uniform thickness of copper across the wafer. Such additive package typically includes accelerators, suppressors and levelers and may optionally include surfactants, defoamers, or ductilizers for the purpose of modifying the properties of the plating bath or the resultant metal deposits. A balance must be struck between the use of such accelerators, suppressors, levelers, and other additives to achieve the desired level of copper fill of apertures without void formation. If such balance is not achieved, then the plating across the wafer may occur much faster than plating within the aperture, resulting in void formation within the apertures. Also, if one of these organic additives is consumed at a faster rate than the others, the plating characteristics of the bath may change. Alternatively, if one of the organic additives is incorrectly added to the electroplating bath, either during bath make-up or replenishment, the plating characteristics of the bath may not be optimum. Thus, it is desirable to provide or enhance bottom-up fill (superfill) with less reliance on the use of organic additives.
Also, exposure of marginally thin copper seed to the highly acidic electrolyte results in partial or complete removal of the thin conductive copper oxide layer on the seed layer, which can expose the underlying agglomerated copper seed layer (xe2x80x9ccopper islandsxe2x80x9d). Copper electroplating with traditional chemistry formulations is not adequate for repair of the thin-agglomerated copper seed, and the final fill result contains bottom voids.
Thus, there is a continuing need for methods of repairing seed layers having discontinuities. There is also a continuing need for electroplating baths that provide good fill of recessed features, that do not require the use of additional metals, that enhance the lateral growth of seed layers to reduce or remove discontinuities, and that are compatible with commercial metal deposition processes, and have less reliance on the use of organic additives.
It has been surprisingly found that acidic electroplating solutions may be used to repair copper seed layer by providing seed layers substantially free of discontinuities prior to subsequent metallization.
In one aspect, the present invention provides a method of providing a metal seed layer substantially free of discontinuities disposed on a substrate including the steps of contacting a metal seed layer disposed on a substrate with an electroplating bath including a) a source of metal ions; b) an electrolyte including two or more acids; c) and optionally one or more additives.
In a second aspect, the present invention provides a method of manufacturing an electronic device including the step of contacting a metal seed layer disposed on a substrate with an electroplating bath including a) a source of metal ions; b) an electrolyte including two or more acids; c) and optionally one or more additives.
In a third aspect, the present invention provides an article of manufacture including an electronic device substrate containing one or more apertures, each aperture containing a seed layer deposit obtained from an electroplating composition that includes a) a source of metal ions; b) an electrolyte including two or more acids; c) and optionally one or more additives.
In a fourth aspect, the present invention provides a method for removing excess material from a semiconductor wafer containing one or more apertures by using a chemical mechanical planarization process which includes contacting the semiconductor wafer with a rotating polishing pad thereby removing the excess material from the semiconductor wafer; wherein the apertures contain a seed layer deposit obtained from an electroplating composition that includes a) a source of metal ions; b) an electrolyte including two or more acids; c) and optionally one or more additives.